DO NOT MERGE: polishing experiments

esp-hal/src/ecc.rs

@@ -39,7 +39,7 @@ use crate::{
 };
 
 /// The ECC Accelerator driver instance
-pub struct Ecc<'d, Dm: DriverMode> {
+pub struct Ecc<'d, Dm> {
     ecc: PeripheralRef<'d, ECC>,
     alignment_helper: AlignmentHelper<SocDependentEndianess>,
     phantom: PhantomData<Dm>,

esp-hal/src/hmac.rs

@@ -298,7 +298,7 @@ impl<'d> Hmac<'d> {
         // The padding will be spanned over 2 blocks
         if mod_cursor > 56 {
             let pad_len = 64 - mod_cursor;
-            self.alignment_helper.volatile_write_bytes(
+            self.alignment_helper.volatile_write(
                 #[cfg(esp32s2)]
                 self.regs().wr_message_(0).as_ptr(),
                 #[cfg(not(esp32s2))]
@@ -320,7 +320,7 @@ impl<'d> Hmac<'d> {
         let mod_cursor = self.byte_written % 64;
         let pad_len = 64 - mod_cursor - core::mem::size_of::<u64>();
 
-        self.alignment_helper.volatile_write_bytes(
+        self.alignment_helper.volatile_write(
             #[cfg(esp32s2)]
             self.regs().wr_message_(0).as_ptr(),
             #[cfg(not(esp32s2))]

esp-hal/src/i2c/master/mod.rs

@@ -430,7 +430,7 @@ impl Default for Config {
 /// ```
 #[derive(Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub struct I2c<'d, Dm: DriverMode> {
+pub struct I2c<'d, Dm> {
     i2c: PeripheralRef<'d, AnyI2c>,
     phantom: PhantomData<Dm>,
     config: Config,
@@ -467,7 +467,7 @@ impl<Dm: DriverMode> embedded_hal::i2c::I2c for I2c<'_, Dm> {
     }
 }
 
-impl<'d, Dm: DriverMode> I2c<'d, Dm> {
+impl<'d, Dm> I2c<'d, Dm> {
     fn driver(&self) -> Driver<'_> {
         Driver {
             info: self.i2c.info(),

esp-hal/src/i2s/master.rs

@@ -463,7 +463,7 @@ impl<Dm> I2sTx<'_, Dm>
 where
     Dm: DriverMode,
 {
-    fn write_bytes(&mut self, data: &[u8]) -> Result<(), Error> {
+    fn write(&mut self, data: &[u8]) -> Result<(), Error> {
         self.start_tx_transfer(&data, false)?;
 
         // wait until I2S_TX_IDLE is 1
@@ -505,8 +505,8 @@ where
     }
 
     /// Writes a slice of data to the I2S peripheral.
-    pub fn write(&mut self, words: &[impl AcceptedWord]) -> Result<(), Error> {
-        self.write_bytes(unsafe {
+    pub fn write_words(&mut self, words: &[impl AcceptedWord]) -> Result<(), Error> {
+        self.write(unsafe {
             core::slice::from_raw_parts(words.as_ptr().cast::<u8>(), core::mem::size_of_val(words))
         })
     }
@@ -591,7 +591,7 @@ impl<Dm> I2sRx<'_, Dm>
 where
     Dm: DriverMode,
 {
-    fn read_bytes(&mut self, mut data: &mut [u8]) -> Result<(), Error> {
+    fn read(&mut self, mut data: &mut [u8]) -> Result<(), Error> {
         self.start_rx_transfer(&mut data, false)?;
 
         // wait until I2S_RX_IDLE is 1
@@ -634,12 +634,12 @@ where
 
     /// Reads a slice of data from the I2S peripheral and stores it in the
     /// provided buffer.
-    pub fn read(&mut self, words: &mut [impl AcceptedWord]) -> Result<(), Error> {
+    pub fn read_words(&mut self, words: &mut [impl AcceptedWord]) -> Result<(), Error> {
         if core::mem::size_of_val(words) > 4096 || words.is_empty() {
             return Err(Error::IllegalArgument);
         }
 
-        self.read_bytes(unsafe {
+        self.read(unsafe {
             core::slice::from_raw_parts_mut(
                 words.as_mut_ptr().cast::<u8>(),
                 core::mem::size_of_val(words),

esp-hal/src/lcd_cam/lcd/dpi.rs

@@ -130,7 +130,7 @@ pub enum ConfigError {
 }
 
 /// Represents the RGB LCD interface.
-pub struct Dpi<'d, Dm: DriverMode> {
+pub struct Dpi<'d, Dm> {
     lcd_cam: PeripheralRef<'d, LCD_CAM>,
     tx_channel: ChannelTx<'d, Blocking, PeripheralTxChannel<LCD_CAM>>,
     _guard: GenericPeripheralGuard<{ system::Peripheral::LcdCam as u8 }>,

esp-hal/src/lcd_cam/lcd/i8080.rs

@@ -92,7 +92,7 @@ pub enum ConfigError {
 }
 
 /// Represents the I8080 LCD interface.
-pub struct I8080<'d, Dm: DriverMode> {
+pub struct I8080<'d, Dm> {
     lcd_cam: PeripheralRef<'d, LCD_CAM>,
     tx_channel: ChannelTx<'d, Blocking, PeripheralTxChannel<LCD_CAM>>,
     _guard: GenericPeripheralGuard<{ system::Peripheral::LcdCam as u8 }>,

esp-hal/src/reg_access.rs

@@ -127,13 +127,7 @@ impl<E: EndianessConverter> AlignmentHelper<E> {
 
     // This function is similar to `volatile_set_memory` but will prepend data that
     // was previously ingested and ensure aligned (u32) writes.
-    pub fn volatile_write_bytes(
-        &mut self,
-        dst_ptr: *mut u32,
-        val: u8,
-        count: usize,
-        offset: usize,
-    ) {
+    pub fn volatile_write(&mut self, dst_ptr: *mut u32, val: u8, count: usize, offset: usize) {
         let dst_ptr = unsafe { dst_ptr.add(offset) };
 
         let mut cursor = if self.buf_fill != 0 {

esp-hal/src/sha.rs

@@ -120,8 +120,8 @@ impl crate::interrupt::InterruptConfigurable for Sha<'_> {
 }
 
 // A few notes on this implementation with regards to 'memcpy',
-// - It seems that ptr::write_bytes already acts as volatile, while ptr::copy_*
-//   does not (in this case)
+// - It seems that ptr::write already acts as volatile, while ptr::copy_* does
+//   not (in this case)
 // - The registers are *not* cleared after processing, so padding needs to be
 //   written out
 // - This component uses core::intrinsics::volatile_* which is unstable, but is
@@ -256,7 +256,7 @@ impl<'d, A: ShaAlgorithm, S: Borrow<Sha<'d>>> ShaDigest<'d, A, S> {
             // Zero out remaining data if buffer is almost full (>=448/896), and process
             // buffer
             let pad_len = A::CHUNK_LENGTH - mod_cursor;
-            self.alignment_helper.volatile_write_bytes(
+            self.alignment_helper.volatile_write(
                 m_mem(&self.sha.borrow().sha, 0),
                 0_u8,
                 pad_len / self.alignment_helper.align_size(),
@@ -274,7 +274,7 @@ impl<'d, A: ShaAlgorithm, S: Borrow<Sha<'d>>> ShaDigest<'d, A, S> {
         let mod_cursor = self.cursor % A::CHUNK_LENGTH; // Should be zero if branched above
         let pad_len = A::CHUNK_LENGTH - mod_cursor - size_of::<u64>();
 
-        self.alignment_helper.volatile_write_bytes(
+        self.alignment_helper.volatile_write(
             m_mem(&self.sha.borrow().sha, 0),
             0,
             pad_len / self.alignment_helper.align_size(),

esp-hal/src/spi/master.rs

@@ -675,17 +675,17 @@ where
 
     /// Write bytes to SPI. After writing, flush is called to ensure all data
     /// has been transmitted.
-    pub fn write_bytes(&mut self, words: &[u8]) -> Result<(), Error> {
-        self.driver().write_bytes(words)?;
+    pub fn write(&mut self, words: &[u8]) -> Result<(), Error> {
+        self.driver().write(words)?;
         self.driver().flush()?;
 
         Ok(())
     }
 
     /// Read bytes from SPI. The provided slice is filled with data received
     /// from the slave.
-    pub fn read_bytes(&mut self, words: &mut [u8]) -> Result<(), Error> {
-        self.driver().read_bytes(words)
+    pub fn read(&mut self, words: &mut [u8]) -> Result<(), Error> {
+        self.driver().read(words)
     }
 
     /// Sends `words` to the slave. Returns the `words` received from the slave.
@@ -1145,7 +1145,7 @@ where
         self.driver().configure_datalen(buffer.len(), 0);
         self.driver().start_operation();
         self.driver().flush()?;
-        self.driver().read_bytes_from_fifo(buffer)
+        self.driver().read_from_fifo(buffer)
     }
 
     /// Half-duplex write.
@@ -1208,7 +1208,7 @@ where
 
         if !buffer.is_empty() {
             // re-using the full-duplex write here
-            self.driver().write_bytes(buffer)?;
+            self.driver().write(buffer)?;
         } else {
             self.driver().start_operation();
         }
@@ -2534,11 +2534,11 @@ mod ehal1 {
         Dm: DriverMode,
     {
         fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
-            self.driver().read_bytes(words)
+            self.driver().read(words)
         }
 
         fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
-            self.driver().write_bytes(words)
+            self.driver().write(words)
         }
 
         fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Self::Error> {
@@ -2578,7 +2578,7 @@ mod ehal1 {
                 if read_inc > 0 {
                     SpiBus::flush(self)?;
                     self.driver()
-                        .read_bytes_from_fifo(&mut read[read_from..read_to])?;
+                        .read_from_fifo(&mut read[read_from..read_to])?;
                 }
 
                 write_from = write_to;
@@ -2601,14 +2601,14 @@ mod ehal1 {
             // We need to flush because the blocking transfer functions may return while a
             // transfer is still in progress.
             self.flush_async().await?;
-            self.driver().read_bytes_async(words).await
+            self.driver().read_async(words).await
         }
 
         async fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
             // We need to flush because the blocking transfer functions may return while a
             // transfer is still in progress.
             self.flush_async().await?;
-            self.driver().write_bytes_async(words).await
+            self.driver().write_async(words).await
         }
 
         async fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Self::Error> {
@@ -2647,7 +2647,7 @@ mod ehal1 {
 
                 if read_inc > 0 {
                     self.driver()
-                        .read_bytes_from_fifo(&mut read[read_from..read_to])?;
+                        .read_from_fifo(&mut read[read_from..read_to])?;
                 }
 
                 write_from = write_to;
@@ -3233,7 +3233,7 @@ impl Driver {
     /// have been sent to the wire. If you must ensure that the whole
     /// messages was written correctly, use [`Self::flush`].
     #[cfg_attr(place_spi_driver_in_ram, ram)]
-    fn write_bytes(&self, words: &[u8]) -> Result<(), Error> {
+    fn write(&self, words: &[u8]) -> Result<(), Error> {
         let num_chunks = words.len() / FIFO_SIZE;
 
         // Flush in case previous writes have not completed yet, required as per
@@ -3260,7 +3260,7 @@ impl Driver {
 
     /// Write bytes to SPI.
     #[cfg_attr(place_spi_driver_in_ram, ram)]
-    async fn write_bytes_async(&self, words: &[u8]) -> Result<(), Error> {
+    async fn write_async(&self, words: &[u8]) -> Result<(), Error> {
         // The fifo has a limited fixed size, so the data must be chunked and then
         // transmitted
         for chunk in words.chunks(FIFO_SIZE) {
@@ -3277,13 +3277,13 @@ impl Driver {
     /// perform flushing. If you want to read the response to something you
     /// have written before, consider using [`Self::transfer`] instead.
     #[cfg_attr(place_spi_driver_in_ram, ram)]
-    fn read_bytes(&self, words: &mut [u8]) -> Result<(), Error> {
+    fn read(&self, words: &mut [u8]) -> Result<(), Error> {
         let empty_array = [EMPTY_WRITE_PAD; FIFO_SIZE];
 
         for chunk in words.chunks_mut(FIFO_SIZE) {
-            self.write_bytes(&empty_array[0..chunk.len()])?;
+            self.write(&empty_array[0..chunk.len()])?;
             self.flush()?;
-            self.read_bytes_from_fifo(chunk)?;
+            self.read_from_fifo(chunk)?;
         }
         Ok(())
     }
@@ -3294,12 +3294,12 @@ impl Driver {
     /// perform flushing. If you want to read the response to something you
     /// have written before, consider using [`Self::transfer`] instead.
     #[cfg_attr(place_spi_driver_in_ram, ram)]
-    async fn read_bytes_async(&self, words: &mut [u8]) -> Result<(), Error> {
+    async fn read_async(&self, words: &mut [u8]) -> Result<(), Error> {
         let empty_array = [EMPTY_WRITE_PAD; FIFO_SIZE];
 
         for chunk in words.chunks_mut(FIFO_SIZE) {
-            self.write_bytes_async(&empty_array[0..chunk.len()]).await?;
-            self.read_bytes_from_fifo(chunk)?;
+            self.write_async(&empty_array[0..chunk.len()]).await?;
+            self.read_from_fifo(chunk)?;
         }
         Ok(())
     }
@@ -3311,7 +3311,7 @@ impl Driver {
     /// something you have written before, consider using [`Self::transfer`]
     /// instead.
     #[cfg_attr(place_spi_driver_in_ram, ram)]
-    fn read_bytes_from_fifo(&self, words: &mut [u8]) -> Result<(), Error> {
+    fn read_from_fifo(&self, words: &mut [u8]) -> Result<(), Error> {
         let reg_block = self.regs();
 
         for chunk in words.chunks_mut(FIFO_SIZE) {
@@ -3345,9 +3345,9 @@ impl Driver {
     #[cfg_attr(place_spi_driver_in_ram, ram)]
     fn transfer<'w>(&self, words: &'w mut [u8]) -> Result<&'w [u8], Error> {
         for chunk in words.chunks_mut(FIFO_SIZE) {
-            self.write_bytes(chunk)?;
+            self.write(chunk)?;
             self.flush()?;
-            self.read_bytes_from_fifo(chunk)?;
+            self.read_from_fifo(chunk)?;
         }
 
         Ok(words)
@@ -3356,8 +3356,8 @@ impl Driver {
     #[cfg_attr(place_spi_driver_in_ram, ram)]
     async fn transfer_in_place_async(&self, words: &mut [u8]) -> Result<(), Error> {
         for chunk in words.chunks_mut(FIFO_SIZE) {
-            self.write_bytes_async(chunk).await?;
-            self.read_bytes_from_fifo(chunk)?;
+            self.write_async(chunk).await?;
+            self.read_from_fifo(chunk)?;
         }
 
         Ok(())

esp-hal/src/twai/mod.rs

@@ -655,7 +655,7 @@ impl BaudRate {
 }
 
 /// An inactive TWAI peripheral in the "Reset"/configuration state.
-pub struct TwaiConfiguration<'d, Dm: DriverMode> {
+pub struct TwaiConfiguration<'d, Dm> {
     twai: PeripheralRef<'d, AnyTwai>,
     filter: Option<(FilterType, [u8; 8])>,
     phantom: PhantomData<Dm>,
@@ -1014,7 +1014,7 @@ impl crate::interrupt::InterruptConfigurable for TwaiConfiguration<'_, Blocking>
 ///
 /// In this mode, the TWAI controller can transmit and receive messages
 /// including error signals (such as error and overload frames).
-pub struct Twai<'d, Dm: DriverMode> {
+pub struct Twai<'d, Dm> {
     twai: PeripheralRef<'d, AnyTwai>,
     tx: TwaiTx<'d, Dm>,
     rx: TwaiRx<'d, Dm>,
@@ -1119,7 +1119,7 @@ where
 }
 
 /// Interface to the TWAI transmitter part.
-pub struct TwaiTx<'d, Dm: DriverMode> {
+pub struct TwaiTx<'d, Dm> {
     twai: PeripheralRef<'d, AnyTwai>,
     phantom: PhantomData<Dm>,
     _guard: PeripheralGuard,
@@ -1164,7 +1164,7 @@ where
 }
 
 /// Interface to the TWAI receiver part.
-pub struct TwaiRx<'d, Dm: DriverMode> {
+pub struct TwaiRx<'d, Dm> {
     twai: PeripheralRef<'d, AnyTwai>,
     phantom: PhantomData<Dm>,
     _guard: PeripheralGuard,