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In timvx,alpha is 0.2, beta is 0.5. We can't modify them, do you have a plane to fix it?
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Supports specifying alpha and beta
38e13ab
VeriSilicon#306 Signed-off-by: Chen Xin <[email protected]>
Added hardsigmoid test case with alpha and beta (#356)
ba6b311
#306 Signed-off-by: Chen Xin <[email protected]>
Already supported and check the test case for reference.
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In timvx,alpha is 0.2, beta is 0.5. We can't modify them, do you have a plane to fix it?
The text was updated successfully, but these errors were encountered: