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SPI: one of the half-duplex modes is not supported #2687
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I think this boils down to just have a way to enable SIO Easiest might be to just add a config option for that |
What would be the effect of that? Every half-duplex transfer would now be 3-wire, regardless of DataMode? Shouldn't SIO be configured on a per-transfer basis, so that we can support 4-wire half duplex on the same bus as 3-wire HD? |
Yes configuring it per transfer was the other option I thought about. We shouldn't allow mixing any other DataMode with 3-wire mode in one transfer, then. Since those functions are fallible already, we can probably just check it and return a new error variant if needed |
I guess we reached consent here? (i.e. add a data mode for three-wire SPI) If yes, I can assign this to me and remove the "investigation" label |
I can't actually tell whether the half-duplex mode we support is 3 or 4-wire single-bit. Our data modes are defined as:
This suggests 4-wire half-duplex mode (MOSI, MISO both transfer data). This is essentially full-duplex with state machine control.
The ESP32 TRM explicitly calls out a different single-bit half-duplex mode:
The other TRMs call out three-line half-duplex mode in a table, e.g. esp32-c6 v1.0 table 28-4.
Additionally, the hardware supports command/address/dummy phases in full-duplex transfer.
This is actually more general than the hardware supports (i.e. it's possible to generate invalid configuration). The set of options is roughly:The text was updated successfully, but these errors were encountered: